Ruud's Commodore Site: 27+8KB RAM expansion for the VIC-20 Home Email

RAM expansion for the VIC-20

The story

First: This isn't just an idea, I have built it by piggy-backing ICs on ones on the motherboard. I ven have heard of people who relaized it with building it as an expansion card. Therefore I considere it as "realized and workin".

The original VIC-20 only contains 5 KB of normal RAM plus 1024*4 bit of colour-RAM. This is not very much. A question one can ask is: "Why 5 KB, and not 4 or 8?" I don't know. But it gave me also some headaches when I wanted to expand my VIC-20 in the early days. But some things have changed since then. One of those things is that nowadays I have many 32K*8 and 8K*8 RAM ICs available. My design is based on using them both.
The VIC-20 can handle 40 KB, has already 5 KB, 32 and 8 make 40, so what about the extra 5 KB? I simply don't use them. Theoretically I could dream up a design which only uses the needed 35 KB but then I would end up with a lots of ICs. Now I only need three plus a dip switch bank.

The schematic


The schematic will reveal that we only need 5 parts and some wires. IC1, the 32KB RAM, covers the first 27 KB, IC2, the 8KB RAM, covers the area $A000-$BFFF.

2018-12-16: If you have visited the site before, you will see a new schematic. The old one contained an error: in the old one the R/W signal needed for the RAM IC was derived from CR/W. That should have been VR/W.
I have build this circuit several times but only INSIDE the VIC-20. And here I used the R/W line coming directly from the 6502. That's why I didn't notice the error. My thanks to norm8322 of the Vintage Computer Forum!

How are the RAMs selected? At the Expansion connector we find several signals we can use for selecting external RAM: RAM1..3, BLK1..3 and BLK5. Combing RAM1..3 and BLK1..3 using two 4-input AND gates (74LS21) results in the needed chip select signal for IC1. All we need to select IC2 is BLK5.

An earlier design was meant to be build inside the VIC-20. One day someone asked me to change my first design so it could be used as a cartridge as well. I first was puzzled by this question until that person pointed out to me that the bus of the VIC-20 lacks the address lines A14 and A15. It turned out that my design only needed some rewiring. The idea is to generate A14 out of the signals RAM1..3 and BLK1. When one of these signals is (L), A14 of the 6502 must become (L) as well. In all other cases A14 leading to IC1 must become (H). This covers the fact that when BLK2 or BLK3 are (L), A14 must be (H). In all other cases, like addressing the stack ($01xx), A14 at IC1 will be (H) as well but in those case no RAM select signal is active (L) ie. IC1 is not selected and therefore not of any importance.


The next question one can ask is: "Where do we place the ICs?" An obvious answer is to build a cartridge. But that has two disadvantages:
- It does not allow you to insert another cartridge unless you have an expansion board.
- It is a lot of work to build the cartridge. January 2023: Ehhh, unless you make a PCB, it has be dine AFAIK. If I find some time, I will create one.

Reading item 2 you probably already guessed there is an easier solution. But some people will consider this as "quick and dirty". The method is nothing else then piggybacking the needed IC on top of the existing ones. The choice is up to you.

Note: There is no need to connect RAM1 to pin 1, RAM2 to pin 2, etc.,etc., etc. You can connect RAM1, RAM2, RAM3 and BLK1 to what ever pin you like of the first AND gate of IC3, IC3A. You can do the same with the pins for the secon AND gate, IC3B.

Having questions or comment? You want more information?
You can email me here.