C64 ISA expansion
What is itAdd the PC ISA bus to your C64 and you can use an enormous variaty of PC cards.
The ideaAlready in 1991 I built an expansion card that gave the C64 access to the 8-bits ISA bus. It enabled me to use a MGA card as main video system. Unfortunately I lost that card during a move :(
In May 2013 I started to work on an ISA expansion for the VIC-20. This project included to replace the 6502 by a 65816 as well. I already proofed that a 65816 can replace a 6510 so I designed a C64 version as well. But the board became so crowded that I decided design two new versions:
- a version without the 65816, this page.
- a version that uses an extra board.
The design - the general ideaSchematic
Not using a 65816 means I have to to use the paging method, as I did in 1991. A method that I didn't like that much as I told in ISA expansion. But in this case I want to revive a project just for old times' sake.
After adding another idea (see later) and to reduce the number of ICs (again), I decided to let the C64 only access the first 1 MB of the 16 MB that a 16-bits ISA card can handle.
In order to use the paging method I need two things:
- a free memory range where I can place the ISA bus.
- a number of I/O bits that enable me to select the right page.
The only free memory range the C64 has you will find from $DE00 to $DFFF, IO1 and IO2 to be precise. These I used indeed in 1991. But it meant I couldn't use any expansion card anymore.
The VIC chip is situated at $D000 and occupies 1024 bytes while only needing less then 64. The same for the SID chip at $D400. Demirroring both ICs would gain me 6 * 256 bytes! Unfortunately not in one contiguous range but in two groups of 768 bytes.
The PC only needs 1024 bytes for its I/O space. And the first 256 bytes are reserved for onboard hardware like the DMA and interrupt ICs. So one 768 bytes group will perfectly do for our I/O needs!
So there are still 768 bytes left, read 3 * 256. This odd number cannot be used for paging but 2 * 256 bytes can. And it automatically leaves us with 256 for our own I/O needs.
Warning: the design won't be able to handle memory cards that depend on the refresh serviced by the PC !!!
The design - the I/OIn 1991 I only had to handle an 8-bits bus, now a 16-bits one: D0..15. Eight bits, D0..7, are supplied by the host system's data bus and are buffered by a 245. D8..15 are supplied by D0..7 as well but with the help of two 573s as temporary buffer.
In case of a 16 bits write operation, the host system first latches the upper data bits D8..15 into the buffer. Writing the bits D0..7 to the ISA bus causes the PC hardware to read these bits as D0..7 plus plus reading the previously to the buffer written bits as D8..15 at the same time.
In case of a 16-bits read operation, the host system first reads the bits D0..7. D8..15 are stored in the temporary buffer at the same time and can be read at a later moment (but before any other ISA read operation).
This double-buffer circuit is used with succes on various cards enabling 8-bits systems to use the IDE hard drives.
In 1991 I didn't handle the interrupts at all, now I decided to do so. In the past I didn't want to use the Intel 8259 and I had many ideas but they all had one thing in common: a lot of ICs were needed. So I changed my mind and put the 8259 in the design.
As said before I need a number of I/O bits to select the right page: a 6526. No more comment needed IMHO.
The design - the glue logicI wonder what kind of weird design I had to make to handle the 768 bytes sized I/O range in combination with the 512 bytes sized memory range. The idea behind it is simple: the moment the I/O range is addressed, the original address line A9 is valid. In case of selecting the memory range, the imaginairy address line IA9 is valid. And how did I handle this? If you have read ISA expansion then you will already know the answer: GALs.
IMHO the two files, GAL-1 and GAL-2, will explain how the various signals are generated.
For more info on PLD files: What are PLD files?
The design - an extra featureIn The VIC-20 Expanded I got a nice idea about how to use a FlashRAM in a different way and I decided to implement it here as well. A 29F020 enables me to handle up to 16 complete sets of ROMs! Four free pins of the 6526 enable me to choose the right set through a menu. Four jumpers enable me to select one in a more quick way.
I got this idea after having started building the board. Having no more free GAL outputs, I decided to add a 74LS08 AND gate.
With Eagle you cannot only design the schematic but also the board. I use the board design only to find out how to place the sockets. The main idea is to piggyback the board on top of the C64 board. The 6510 and U15, a 74LS139, serve as connections. These ICs are placed on the new board and some sockets between the board and the original sockets form the connection between both boards.
I found an error :(Writing this text I discovered that nothing was said about the RDY input. Then I found out that I even hadn't connected IOCHRDY to anything! The damage was repaired quite quickly using one of the left over AND gates.
You want more?If you want more than just an ISA bus, please have a look at this project: C64/128 ISA expansion PLUS.
You can email me here.