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C64IDE: an IDE-hard disk drive for your C64/128




What is it?

At this moment you can get small IDE-hard disk drives for peanuts. So I got interested in connecting one to my C64 in one or another way. The result was an interface of just eight common available cheap ICs. With some small changes you should be able to connect the interface to any other C= as well.


Theory

There is no specific knowledge of the IDE-bus needed to understand how my interface works. The IDE-bus is based on the old MFM-, RLL- and ESDI-hard disk drives. The idea rose to integrate the controller on the board in the PC with the onboard controller of the hard disk drive and to attach the resulting board to the hard disk drive. The only signals needed for the resulting board would be the same signals as those after decoding the complete ISA-bus. These signals together form the IDE-bus.

The signals we need for our interface are:

  • 16 data bits, D0..D15
  • 3 address lines, A0..A2
  • 2 Registerblock-selectlines, CS0 and CS1
  • 2 Read/write lines, IOW and IOR
There are more lines on the IDE-bus but they are only needed for very fast computers. For example: there is an Interrupt-line that becomes active every time the execution of a command has been finished. This may be very useful with a Pentium 300 MHz but I already found out that handling an interrupt by a C64 would cost much more time then just waiting for the BUSY-flag to clear.

There is one other line I use but is not needed for the correct working of the interface itself: DASP. The function of this line is to blink a LED when the HD is executing a command or reading/writing data. For me it was quite helpful during debugging.

The IDE-HD has two blocks of eight registers each: the "Command Block Registers" and the "Control Block Registers". The first block is chosen by negating CS0, the second by negating CS1. Applying the right value to the address lines A0..2 chooses the correct register within each block. Reading from or writing to a register is done by negating IOR or IOW. The IDE bus is, as said before, 16 bits wide but the registers are only 8 bits wide.


The design

Have a look at the schematics. The IDE bus is 16 bits wide, the bus of the C64 only 8 bits. So we have to store the extra 8 bits in some way. This is where IC1 and IC2, both 74ALS574s, come in action. IC1 is used to store the high byte when writing data, IC2 is used to store the read high byte.
IC3, a 74LS245, is used as buffer between the interface and the C64/128.

These 74ALS574s and the IDE-bus have to be addressed in some way. The main signal is I/O1 but you are free to select I/O2 instead. I/O1 is OR-ed (IC6A) with the signal outputted by Q\ of IC5A, a 74LS74 Data Flip-flop.
The only function of IC5A is to delay the rising edge of Phi2. This is needed because sometimes the VIC-II video IC occupies the bus a bit longer then it should. By delaying the edge of Phi2, and thus the edges of WR and RD for the IDE-bus, we make sure that the IDE-bus sees a valid address bus.

The resulting signal outputted by IC6A is fed to both IC4A and IC4B, two 74LS139 2-to-4 demultiplexers. IC4A is fed by the R/W-line and address line A4 and outputs four signals:
- Y0: the WR signal for the IDE-bus which also tells IC1 to output its data.
- Y1: the RD signal for the IDE-bus which also tells IC2 to store D8..15, the data bits outputted by the IDE-bus.
- Y2: the signal that tells IC1 to store the data meant for D8..D15 of the IDE-bus.
- Y3: the signal that tells IC2 to output the data, read from the IDE-bus.
A4 determines whether the IDE-bus is selected or not.
As you can see, IC1 outputs its data during every write action for the IDE-bus. This is no problem at all. On the other hand, IC2 reads D8..15 during every read action from the IDE-bus. This means the C64 must read the contents of IC2 after having read the data register otherwise it will run the risk of loosing this data.

IC4B determines by means of address line A3 whether CS0 or CS1 is activated. Again A4 determines whether the IDE-bus is selected or not.


Unexplained items

The resistors R2..R4 are there because the IDE-specifications say to do so. R1 and LED1 enable you to see if the HD is performing a command or a data transfer.


Connecting the interface to other Commodores

The only thing you have to do is to generate a kind of 'Chip Select' signal that can replace the signal generated by IC6A. This means the combination of an address range and Phi2.


Software

No real SW has been and will be developed for this project. I once had some SW to test the interface but, unfortunately, I lost it. For the moment you have to do with the following "how to do it and why".

The IDE-HD has two sets of registers with each the following registers:

+-----+-----+-----+---+---+---+----------------+---------------+
| reg | CS0 | CS1 |A2 |A1 |A0 | Read (-IOR)    | Write (-IOW)  |
+-----+-----+-----+---+---+---+----------------+---------------+
|     |  0  |  0  | X | X | X | ILLEGAL        | ILLEGAL       |
+-----+-----+-----+---+---+---+----------------+---------------+----------+ 
|  0  |  0  |  1  | 0 | 0 | 0 | Data Port      | Data Port     | <--+     | 
|  1  |  0  |  1  | 0 | 0 | 1 | Error Register | Precomp       |    |     | 
|  2  |  0  |  1  | 0 | 1 | 0 | Sector Count   | Sector Count  | Command  | 
|  3  |  0  |  1  | 0 | 1 | 1 | Sector Number  | Sector Number | Block    | 
|  4  |  0  |  1  | 1 | 0 | 0 | Cylinder Low   | Cylinder Low  | Registers| 
|  5  |  0  |  1  | 1 | 0 | 1 | Cylinder High  | Cylinder High |    |     | 
|  6  |  0  |  1  | 1 | 1 | 0 | Drive / Head   | Drive / Head  |    |     | 
|  7  |  0  |  1  | 1 | 1 | 1 | Status         | Command       | <--+     | 
+-----+-----+-----+---+---+---+----------------+---------------+----------+ 
|     |  1  |  1  | X | X | X | High Impedance | Not Used      |          | 
|  0  |  1  |  0  | 0 | 0 | 0 | High Impedance | Not Used      | <--+     | 
| ... |  1  |  0  |    ...    | High Impedance | Not Used      | Control  | 
|  5  |  1  |  0  | 1 | 0 | 1 | High Impedance | Not Used      | Block    | 
|  6  |  1  |  0  | 1 | 1 | 0 | Altern Status  | Device Control| Registers| 
|  7  |  1  |  0  | 1 | 1 | 1 | Drive Address  | Not Used      | <--+     | 
+-----+-----+-----+---+---+---+----------------+---------------+----------+ 
0    r/w     data register

1    r       error register
diagnostic mode errors:
bit 7-3        reserved
bit 2-1 = 001  no error detected
        = 010  formatter device error
        = 011  sector buffer error
        = 100  ECC circuitry error
        = 101  controlling microprocessor error

operation mode:
bit 7  = 1  bad block detected
       = 0  block OK
bit 6  = 1  uncorrectable ECC error
       = 0  no error
bit 5       reserved
bit 4  = 1  ID not found
       = 0  ID found
bit 3       reserved
bit 2  = 1  command aborted
       = 0  command completed
bit 1  = 1  track 000 not found
       = 0  track 000 found
bit 0  = 1  DAM not found
       = 0  DAM found (CP-3022 always 0)

1    w       WPC/4  (Write Precompensation Cylinder divided by 4)

2    r/w     sector count

3    r/w     sector number

4    r/w     cylinder low

5    r/w     cylinder high

6    r/w     drive/head
                 bit 7   = 1
                 bit 6   = 0
                 bit 5   = 1
                 bit 4   = 0  drive 0 select
                         = 1  drive 1 select
                 bit 3-0      head select bits

7    r       status register
bit 7 = 1  controller is executing a command
bit 6 = 1  drive is ready
bit 5 = 1  write fault
bit 4 = 1  seek complete
bit 3 = 1  sector buffer requires servicing
bit 2 = 1  disk data read successfully corrected
bit 1 = 1  index - set to 1 each disk revolution
bit 0 = 1  previous command ended in an error

7    w       command register
             commands:
                 98 E5   check power mode       (IDE)
                 90      execute drive diagnostics
                 50      format track
                 EC      identify drive         (IDE)
                 97 E3   idle                   (IDE)
                 95 E1   idle immediate         (IDE)
                 91      initialize drive parameters
                 1x      recalibrate
                 E4      read buffer            (IDE)
                 C8      read DMA with retry    (IDE)
                 C9      read DMA without retry (IDE)
                 C4      read multiples         (IDE)
20	read sectors with retry
21	read sectors without retry
22	read long with retry
23	read long without retry
40	read verify sectors with retry
41	read verify sectors without retry
                 7x      seek
                 EF      set features           (IDE)
                 C6      set multiple mode      (IDE)
                 99 E6   set sleep mode         (IDE)
                 96 E2   standby                (IDE)
                 94 E0   standby immediate      (IDE)
                 E8      write buffer           (IDE)
                 CA      write DMA with retry   (IDE)
                 CB      write DMA with retry   (IDE)
                 C5      write multiple         (IDE)
                 E9      write same             (IDE)
30	write sectors with retry
31	write sectors without retry
32	write long with retry
33	write long without retry
                 3C      write verify           (IDE)
                 9A      vendor unique          (IDE)
                 C0-C3   vendor unique          (IDE)
                 8x      vendor unique          (IDE)
                 F0-F4   EATA standard          (IDE)
                 F5-FF   vendor unique          (IDE)

The future....

There will be no future for this design as is. First there already exists the IDE64 for the C64 and I don't feel the need to compete with these guys. Also seeing the problems our Czech friends have with its 1541 compatibility, I decided to turn my attention to another idea: 1541IDE; connecting the interface to a 1541-board.
Regarding the PETs, CBMs and other IEEE computers, as they hardly use speed loaders or other hardware dependant soft- and hardware, I have CBM-HD; a PC emulating various IEEE-drives. But I'm playing with the idea of connecting the interface with an 8250 board.....





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