1541: The computer inside.
Many people, even C= owners, don't realize that there is a real computer inside the 1541. This document is meant to inform you about the ins and outs of this computer. It will also discuss the differences between the various 1541-models INCLUDING the 1540.
That part of the electronics dealing with transferring the data to/from the floppy disk is discussed in 1541: Transferring data and therefore will not be discussed in this document.
The models I know of
At this moment I know several models of 1540/1541:- 1540
This drive is not known very well but is in fact the predecessor of the 1541's we know of. It has a ivory coloured case with a brown label and it was developed for use with the VIC-20. It contains the "Very Long Board" (VLB). - 1541-1
The first 1541's were actually 1540's but with an altered ROM. The alteration was needed because the VIC-20 worked at exactly 1 MHz and the C64 worked on a little slower or faster frequency, dependent if it was a PAL or NTSC machine.
Personal note: I own a 1541 that is labeled 1541 on the front but 1540 on the back. - 1541-2
With this 1541 I mean the wellknown brownish one. This one contains the "Long Board #1" (LB1). - 1541-3
This one looks like the previous one but has a white colour. This one contains the "Long Board #2" (LB2). - 1541C
This is the white 1541 with a turning shutter. The previous drives had the vertical opening/closing shutter. This one contains the "Short Board" (SB). - 1541-II
This is the small 1541 with the external power supply. This one contains the "Very Small Board" (VSB).
As I mentioned, the difference between the 1540 and the 1541-1 was only a different ROM. The ROMs of the later models have been updated several times as well. IMHO this is a SOFTWARE matter and so I won't pay further attention to this item in this document.
The basics
The basics of the 1541-computer:- 6502 - microprocessor
- 2 KB of RAM
Except the VLB, all the boards use a 2K*8 SRAM: the 2016, 6116 or equivalent. The VLB uses four 2114's, a 1K*4 SRAM. - 16 KB of ROM
All the (Very) Long Boards use two 2364's: 8K*8 ROM. The others use the 27128 16K*8 (one time programmable) EPROM. The OTP version misses the expensive quartz glass that enables the user to erase the data using UV light. - two 6522's
The boards (or better, the differences between them)
Although there are at least five different boards, they all work the same: with the exception of the DOS of the 1541C, you can exchange all other DOS versions. There is even no problem running the DOS of 1541-II or 1540 on a 1541C. The other way around you'll run into problems.The main differences between the VLB and LB1:
- As described above, the VLB uses four 2114's, the LB one 2016.
- A lot of the digital hardware handling the transfer of data from/to the floppy is compressed into one custom IC: 325572-01 (UC1).
- Normally the "Byte ready" signal coming from UC1, the custom IC, goes directly to the SO input of the 6502. On LB2 it can be redirected through a 74LS74 flipflop. PHI1 is used to clock the signal. Output Q reflects its state after every positive flank of PHI1. There are soldering islands whether to choose for this option (J2) or not (J1).
And then the strange thing about this option, at least looking at the schematics (251834 rev. C): I would expect that one can choose which signal is going to the SO input: the Q output or the BR signal. Instead one can choose between connecting the BR signal with the SO input or with the D input of the 74LS74. Whatever one chooses, the Q output remains connected. I first have to check this with a real board to be sure that it isn't just a faulty schematic.
Later it occurred to me that, when using J2, you are supposed to cut the line coming from the Q output.
- On LB1 CLK2 is delayed (why anyway ???) by using two inverter gates of UC6 (74LS04).
On LB2 CLK2 can be mixed with CLK0 using an NOR gate of UC5 (74LS02). The output of the NOR gate is connected to the second inverter. The output of the first original inverter can be connected to the same second inverter through a soldering island. But there are no means to disconnect the NOR gate unless we use the option mentioned above, cutting the line.
- The reset circuit has been changed slightly by adding an extra inverter (74LS14, UA1D) between capacitor C46 and EXOR gate UD3B. Input 4 of UD3B is now tied to +5V.
- A 555 used as a monostable multivibrator is added to the design. A pulse fed to the 555 causes it to generate a pulse of several seconds. This signal is fed to an open collector inverter, UB1D (74LS06), which is placed parallel to UD2A. Both gates can activate the drive motor.
The pulse can be derived from the write protection detector through soldering island J3.
The idea of this addition is to turn the drive motor on for some seconds when inserting a floppy. The turning motor helps the mechanism to center the disk in the mechanism.
A pulse also can be fed from pin 14 of connector P6 through soldering island J4. The problem is that I have no idea yet where pin 14 is used for.
- One 27128 replaced the two 2364 EPROMs.
- The custom ICs and the glue logic of LB1 have been replaced by two other custom ICs: UC4 and UC5.
- The analogue part has been replaced by an hybrid IC, UD1.
- Track 0 detector
The most significant difference is the presence of a track 0 detector: no more bumps anymore :) PA0 of UC1 is used as input line for this signal. Strangely enough there is an option disabling the input through soldering island J3.
Because of this detector, the software had to be changed as well.
And this detector is the reason the software of this model cannot be used for the other boards: when moving the head outwards, the software will be waiting for a signal from a detector which is not on the board. IMHO this could destroy the drive as the software will keep on pushing the head outwards until infinity.
Remark: the above is just a guess, so I could be wrong. Having no sources of this particular software, I cannot check the code to see what would happen. And I am not going to wager one of my drives. If you are more then curious, I won't stop you :)
- The custom ICs and the hybride IC have been replaced by one custom IC.
- The power supply is placed outside the drive; it has to be fed with +12V and +5V.
- The configuration of the internal connectors toward the actual drive have been changed.
- The track 0 detector has been dropped, SW has been changed. PA0 remains tied to GND. (No idea why, the software isn't using this port anyway. In fact you can cut the connection to Ground without any problem at all.).
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